There is a lot of thought needed, or at least should be, to designing an efficient and high performing line driver circuit. The line driver and the line interface circuit should minimally impact the performance of the PLC communication channel, just like one customer requested from us, “a wire with gain.” It starts with a versatile, robust, high performance line driver like the P1000 or P2000. Robustness is what is important to design because the load and demands are different from the lab, so the line interface circuit must be designed to approach that wire over a broad range of load conditions such that it seldom become the dominant source of signal degradation. This series of application note topics will help you analyze and optimize your interface circuitry to conform to the often mutually exclusive constraints, standards, and specifications. The first application note looks at designing the interface circuit. I hope you benefit from it, and you come back for the next application note of the series. You can download it from
P1000 Line Driver IP Information for Narrow-band PLC Analog Front-end (AFE) Application Notes)